In the Large Hadron Collider Beauty (LHCb) experiment at CERN, Geneva, researchers study the decays of B mesons produced during high-energy proton collisions in the Large hadron collider (LHC). A complex system of detectors and readout electronics is utilized to detect the multitude of particles generated in each proton beam collision. The detector readout electronics must be fast and precise enough to capture particle hits that may occur every 25 ns. To achieve this accuracy, modern technological solutions such as ASIC and FPGA chips are employed. To increase the amount of data collected in experiments, the luminosity of the LHC accelerator is set to be increased by a factor of 10 over the next decade. This enhancement poses a challenge for particle detection, as it will lead to higher radiation levels and particle occupancy on the detectors, necessitating upgrades to some detector components. Among the first upgraded components in LHCb will be the two RICH (Ring-imaging Cherenkov) detectors; their readout electronics will be upgraded to achieve timestamping of detected Cherenkov photons with a precision under 10 ps. The new readout chip is named FastRICH.
My work primarily focuses on the backend electronics responsible for control and data acquisition from the entire LHCb detector. To assist in its development, we have designed a frontend electronics emulator which uses a new communication protocol called lpGBT. We call it lpGBT frontend emulator or LFE. We have already implemented the first emulator prototype of the FastRICH chip, which emulates its data output. Additionally, we have conducted initial measurements of the timing distribution accuracy using several backend electronics prototypes. The goal is to achieve the timing accuracy of the FastRICH chip; the uncertainty in the phase of the transmitted clock signal must therefore be below 10 ps. The results are promising, but current prototypes are not yet fully realistic.
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