izpis_h1_title_alt

Programiranje vezij FPGA z ogrodjem OpenCL
ID Palčič, Žan (Author), ID Lotrič, Uroš (Mentor) More about this mentor... This link opens in a new window

.pdfPDF - Presentation file, Download (3,06 MB)
MD5: 4E6395CAF40890673132E2AC79783545
PID: 20.500.12556/rul/7d9d4e4b-3e82-48e0-b2ff-6fbf454a7b70

Abstract
V diplomskem delu se osredotočamo na testiranje programirljivega vezja s pomočjo programskega ogrodja OpenCL in predstavimo različne optimizacije, ki jih ponuja Alterina razširitev ogrodja OpenCL, lastnosti in načine uporabe ploščice FPGA. Naš cilj v delu je bil ugotoviti, kakšna je učinkovitost sinteze vezja z ogrodjem OpenCL, kakšen je vpliv različnih optimizacij na učinkovitost izvajanja ščepcev, in rezultate primerjati z izvajanjem na grafično procesni enoti. Uporabo ogrodja OpenCL na vezju FPGA smo analizirali z implementacijo nenatančnega množilnika, matričnega množenja, Sobelovega filtra in rezanja šivov. To smo implementirali v splošnejši obliki, za izvajanje na več arhitekturah, in v optimizirani obliki, za izvajanje le na vezjih FPGA.

Language:Slovenian
Keywords:OpenCL, FPGA, VHDL, heterogeni sistemi, rezanje šivov, Sobelov filter
Work type:Bachelor thesis/paper
Organization:FRI - Faculty of Computer and Information Science
Year:2016
PID:20.500.12556/RUL-91235 This link opens in a new window
Publication date in RUL:27.03.2017
Views:1483
Downloads:412
Metadata:XML RDF-CHPDL DC-XML DC-RDF
:
Copy citation
Share:Bookmark and Share

Secondary language

Language:English
Title:Programming FPGA circuits with OpenCL framework
Abstract:
Main focus of our thesis is testing FPGA circuit with OpenCL framework. The thesis presents different optimization methods that extends OpenCL framework, features of FPGA board, and overview of different programming designs with FPGA board. Our aim is to determine the OpenCL compiler's efficiency while translating high-level kernels to low-level circuit, impact of various optimizations on kernel's runtime and compare results with performance on the graphics processing unit. We analyse designs build with OpenCL on FPGA circuit through implementations of approximate multiplier, matrix multiplication, Sobel filter, and Seam carving. Mainly, the implementations are device independent, for executing kernels on many different architectures, while some of them are optimized for FPGAs only.

Keywords:OpenCL, FPGA, VHDL, Heterogeneous systems, Seam carving, Sobel filter

Similar documents

Similar works from RUL:
Similar works from other Slovenian collections:

Back