Main focus of our thesis is testing FPGA circuit with OpenCL framework. The thesis presents different optimization methods that extends OpenCL framework, features of FPGA board, and overview of different programming designs with FPGA board. Our aim is to determine the OpenCL compiler's efficiency while translating high-level kernels to low-level circuit, impact of various optimizations on kernel's runtime and compare results with performance on the graphics processing unit. We analyse designs build with OpenCL on FPGA circuit through implementations of approximate multiplier, matrix multiplication, Sobel filter, and Seam carving. Mainly, the implementations are device independent, for executing kernels on many different architectures, while some of them are optimized for FPGAs only.
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