Logični analizator za vodilo CAN s spletnim vmesnikom

SAKSIDA, KRISTJAN (author), Trost, Andrej (mentor)

Na trgu lahko najdemo več različic logičnih analizatorjev, ki pa večinoma nimajo možnosti direktnega priklopa na omrežje ter ne omogočajo neposrednega internetnega dostopa do vzorčenih podatkov. Potreba po takšnem dostopu do podatkov se pojavi npr. v avtomobilski industriji, kjer se izvajajo vzorčenja na testnih stezah. Magistrsko delo opisuje postavitev koncepta logičnega analizatorja s spletnim vmesnikom, ki je prilagojen za CAN vodilo. Koncept temelji na sistemu na čipu Xilinx Zynq, kjer je vzorčevalni del narejen v programirljivi logiki FPGA. Vzorci se shranjujejo v pomnilnik BRAM, od koder so s TCP-protokolom poslani do uporabnika. To funkcijo opravlja operacijski sistem v realnem času FreeRTOS, ki hkrati poganja spletni strežnik. Spletni vmesnik sloni na Microsoftovem vtičniku Silverlight, ki podpira TCP-protokol. S tako zgrajenim logičnim analizatorjem omogočimo uporabniku prijazno in enostavno upravljanje na daljavo iz samega brskalnika in to brez dodatne programske opreme.

• Language: Slovenian
• Keywords: CAN-vodilo, logični analizator, sistem na čipu, FPGA, Xilinx Zynq, FreeRTOS, Microsoft Silverlight, spletni vmesnik, TCP-protokol
• Work type: Master's thesis/paper
• Organization: FE - Faculty of Electrical Engineering
• Year: 2015
• PID: 20.500.12556/RUL-30841
• Publication date in RUL: 29.06.2015

Secondary language

• Language: English
• Title: Logic Analyzer for CAN Bus with Web Interface

Abstract

Several versions of logic analyzers can be found on the market but mostly they do not have the possibility of direct connection to the network and do not provide direct internet access to the sampled data. The need for such access to data appears for example in the automotive industry where samplings are carried out on test tracks. The master's thesis describes a concept of a logical analyzer with a web interface which is adapted to the CAN bus. The concept is based on a system on Xilinx Zynq chip where the sampling part is made in the FPGA programmable logic. Samples are stored in the BRAM memory from where they are sent to the user via TCP protocol. This function is performed in real time by the FreeRTOS operating system which simultaneously drives the web server. Web interface is based on the Microsoft Silverlight plug-in which supports TCP protocol. With such construction of the logic analyzer we provide user friendly and easy remote management from a browser without any additional software.

• Keywords: CAN bus, logic analyzer, system-on-chip, FPGA, Xilinx Zynq, FreeRTOS, Microsoft Silverlight, web interface, TCP protocol