Sistem za zajem podatkov z vezjem FPGA

PERKO, TINA (author), Trost, Andrej (mentor)

Magistrska naloga se osredotoča na razvoj in implementacijo sistema za zajem podatkov, ki temelji na vezju FPGA. V nalogi sta izvedena pregled in analiza obstoječih sistemov za zajem podatkov, kjer so predstavljene različne vrste sistemov, njihove funkcionalnosti, hitrost zajema, pomnilniške rešitve in povezljivost z zunanjimi napravami. Razvit je bil demonstracijski sistem za zajem podatkov na razvojni plošči XEM7310-A200, ki vključuje analogno-digitalni pretvornik, zunanji SDRAM pomnilnik in vmesnik USB 3.0 za prenos podatkov. Sistem je bil implementiran s pomočjo orodja Vivado v strojno-opisnem jeziku Verilog. Sestavljen je iz štirih modulov: modula za zajem analogno-digitalnih podatkov, modula za nadzor zapisa podatkov, modula za interakcijo z vmesnikom SDRAM pomnilnika in vrhnji modul, ki povezuje vse prej naštete module in uporabljena IP jedra: dva FIFO registra, pomnilniški vmesnik MIG, analogno-digitalni pretvornik XADC, vmesnik za povezavo z računalnikom FrontPanel in generator ure clocking wizard. Poleg tega smo implementirali programsko opremo, ki omogoča prenos podatkov med vezjem FPGA in računalnikom. Podatki se po prenosu zapišejo v .csv datoteko, kjer so uporabniku na voljo za nadaljnjo obdelavo. Sistem zajema vrednost analogne vhodne napetosti z 12-bitnim analogno-digitalnim pretvornikom s frekvenco 500 kHz.

• Language: Slovenian
• Keywords: sistem za zbiranje podatkov, vezje FPFA, analogno-digitalni pretvornik, DDR SDRAM pomnilnik, USB 3.0.
• Work type: Master's thesis/paper
• Organization: FE - Faculty of Electrical Engineering
• Year: 2024
• PID: 20.500.12556/RUL-161047
• Publication date in RUL: 06.09.2024

Secondary language

• Language: English
• Title: Data acquisition system with FPGA circuit

Abstract

This Master thesis focuses on the development and implementation of an FPGA-based data acquisition system. The thesis provides an overview and analysis of existing data acquisition systems, presenting the different types of systems, their functionalities, acquisition speed, memory solutions and connectivity to external devices. A demonstration data acquisition system has been developed on the XEM7310-A200 development board, which includes an analogue-to-digital converter, an external SDRAM memory and a USB 3.0 interface for data transfer. The system was implemented using the Vivado tool in the Verilog hardware-description language. It consists of four modules: an analogue-to-digital data acquisition module, a data write control module, a module for interacting with the SDRAM memory interface and a top module which interfaces all the above modules and the IP cores used: two FIFO registers, a MIG memory interface, an XADC analogue-to-digital converter, a FrontPanel computer interface and a clock clocking wizard generator. In addition, we have implemented software that allows data transfer between the FPGA and the computer. After the transfer, the data is written to a .csv file where it is available to the user for further processing. The system captures the value of the analogue input voltage using a 12-bit analogue-to-digital converter at 500 kHz.

• Keywords: sistem za zbiranje podatkov, vezje FPFA, analogno-digitalni pretvornik, DDR SDRAM pomnilnik, USB 3.0.