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ANALIZA ODTEKANJA INFORMACIJE IZ DIGITALNEGA INTEGRIRANEGA VEZJA PREKO PORABE MOČI
ID LAPANJA, STAŠ (Author), ID Trost, Andrej (Mentor) More about this mentor... This link opens in a new window

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PID: 20.500.12556/rul/3760136c-580e-4821-be5b-6dd5ce429915

Abstract
Od elektronskih sistemov pričakujemo, da varno shranjujejo zasebne podatke. Če načrtovalci algoritmov, strojne in programske opreme ne sodelujejo in razumejo dela drugih, lahko pride do predvidevanj o varnosti na neki ravni sistema, ki se ne skladajo z dejanskimi lastnostmi druge ravni. Posledica tega so možna nezaželena odtekanja informacije preko stranskih kanalov. Primeri stranskih kanalov so čas izvajanja operacij, poraba moči, elektromagnetno, toplotno in zvočno sevanje. Stranski kanali se lahko uporabljajo za napade na kriptografske sisteme, katerih matematični algoritmi ne vsebujejo nobenih znanih ranljivosti, za razliko od tradicionalnih kriptoanalitičnih metod, kot sta na primer linearna in diferencialna kriptoanaliza. Relativno poceni in prosto dostopna merilna oprema je pogosto zadostna za izvedbo takih napadov, kar zahteva resen razmislek pri izbiri algoritmov in njihovi implementaciji. To delo bo raziskalo potencialni obstoj stranskega kanala v procesorju BA20 podjetja Beyond Semiconductor. Za analizo stranskega kanala so bo delo osredotočilo na metodi analize porabe moči DPA in CPA. Metodi bosta najprej preverjeni na preprostem modelu vezja na nivoju registrov nato pa na sintetiziranem vezju. Procesor BA20 bo analiziran v sintetizirani obliki. Sinteza bo narejena v 65-nm CMOS tehnologiji. Raziskane bodo možne rešitve za zaščito pred odtekanjem informacije preko porabe moči in primerne predlagane za primer procesorja BA20.

Language:Slovenian
Keywords:procesor, sinteza, kriptografija, napadi na stranske kanale, analiza porabe moči, modeliranje porabe CMOS, DPA, CPA, protiukrepi
Work type:Master's thesis
Organization:FE - Faculty of Electrical Engineering
Year:2016
PID:20.500.12556/RUL-97649 This link opens in a new window
Publication date in RUL:03.11.2017
Views:1204
Downloads:617
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Secondary language

Language:English
Title:ANALYSIS OF INFORMATION LEAKAGE FROM A DIGITAL INTEGRATED CIRCUIT THROUGH POWER CONSUMPTION
Abstract:
It is assumed that electronic systems should securely store private data. If algorithm designers, hardware engineers and software developers do not cooperate and understand each others’ work, security assumptions made in one layer of a system may not match the actual properties of other layers. This can result in information leakage trough the side-channels. Examples of side-channels are operation execution timing, power consumption, electromagnetic radiation, thermal and acoustic emanations. Side-channels may be used for breaking cryptographic systems with no known weaknesses in the mathematical structure of the algorithm, unlike traditional cryptanalytic methods, such as linear and differential cryptanalysis. Relatively cheap an easily obtained measurement equipment is usually enough for doing many of these attacks making them a significant concern when selecting an algorithm and designing its implementation. This thesis will research the potential existence of a side-channel in a BA20 processor designed by Beyond Semiconductor. Side-channel analysis will be done using the DPA and CPA power analysis methods. These two methods will be verified first using a simple RTL model and later a synthesized version of this model. Processor BA20 will be synthesized for the analysis. Synthesis will be done in a 65-nm CMOS technology. Possible solutions for protection from side-channel leakages will be analysed and the optimal one suggested in the case of a BA20 processor.

Keywords:processor, synthesis, cryptography, side-channel attacks, power analysis, modeling of CMOS power consumption, DPA, CPA, countermeasures

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