This dissertation presents the development of the advanced gate control method for power
transistors, the design of the corresponding circuit and the evaluation of its efficiency. The
method increases the potential for finding the optimal trade-off between switching losses and
electromagnetic emissions during a power converter design process.
The trade-off between switching losses and electromagnetic emissions originates in the
specific switching sequence of the power transistor that drives an inductive load. Particularly,
the current transition occurs at the full voltage on the transistor, and similarly, the
voltage transition occurs at the full current through the transistor which results in high power
dissipation i.e. switching losses. Losses could be reduced by setting fast current and
voltage transitions, but at the expense of the increased electromagnetic emissions rate as the
latter is also dependent on the voltage and current transition slopes. In order to find the
optimal trade-off it is necessary to set the fastest transitions that still not cause excessive
electromagnetic emissions.
Employing the conventional gate control method for power transistors, the transition
slopes are adjusted by changing the series gate resistor value. However, such approach limits
the potential for finding the optimal trade-off since changing the resistance influences all
intervals of the switching sequence simultaneously. Mitigating the critical slope that causes
excessive emissions therefore extends the duration of all intervals. This results in increased
switching losses, extended delays and extended final gate charging and discharging durations.
Thus, the overall application efficiency is affected.
Several papers report improvements of the conventional gate control method. Mostly,
these methods are only focusing on improving a specific critical behavior during the switching
sequence, e.g. mitigating the severity of the reverse recovery during turn-on or the voltage
overshoot during turn-off. In order to sense the power transistor operating point, some
methods utilize circuits that highly affect the application design or limit the usability of the
method to a certain current or voltage range.
To improve presented drawbacks of the conventional and other gate control methods,
a novel advanced gate control method and corresponding circuit were developed and are
presented in this dissertation. The circuit is composed of two main units, namely the control
circuit unit and the current sources unit. The control circuit senses the power transistor
operating point, detects switching sequence intervals and prepares control signals required
by the current sources unit. The latter charges and discharges the power transistor gate
capacitance. The system utilizes the gate current shaping principle and allows to set the
gate current amplitude in each interval of the switching sequence separately. In this way the control over each transition in each interval of the switching sequence is enabled, allowing
to mitigate only the critical current or voltage slope without excessively increasing switching
losses, extending delays or extending final gate charging and discharging durations.
The design of the circuit allows its implementation in a broad spectrum of applications
regardless of the current or voltage rating and with a minimal impact on the application
design. To sense the operating point of the controlled power transistor it is only required
to monitor the gate-source voltage and the drain-source voltage, while the power converter
controller is only required to forward the power transistor turn-on/ turn-off logic signal.
The method is implemented as an integrated circuit. The integration enables short propagation
delays that are crucial for the adequate operation and also offers an efficient way
for the current sources implementation.
The efficiency of the presented method is evaluated through a comparison with the conventional
control method. Using a test circuit with a power MOSFET transistor, the rate
of switching losses, delays and final gate charging and discharging durations is compared in
respect to the current or voltage slopes which reflect the electromagnetic emissions rate.
It is discovered that the switching efficiency is notably higher if the presented method is
used. At the same rate of electromagnetic emissions there are less switching losses dissipated.
Moreover, shorter delays and shorter final charging and discharging durations are achieved.
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