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Zaznavanje velikih objektov na binarni sliki s hitro kamero
ID GRLJ, JANI (Author), ID Trost, Andrej (Mentor) More about this mentor... This link opens in a new window

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PID: 20.500.12556/rul/1d77f4fd-d47d-4485-abe6-8ddb66b48e06

Abstract
Cilj diplomskega dela je bil prvotni algoritem za obdelavo slike, ki obdeluje slike na osebnem računalniku in je napisan v programskem jeziku C, pretvoriti v digitalno vezje, opisano v jeziku VHDL. Algoritem, pretvorjen v VHDL, smo implementirali na programirljiv sistem na integriranem vezju, ki je vgrajen v kameri Velociraptor, podjetja Optomotive. Naloga algoritma je, da na digitalni sliki poišče območja, ki so sestavljena iz večjega števila sosednjih si slikovnih točk s podobnimi lastnostmi (svetlost) in jim določi center. Vhodni podatki v algoritem so surove sivinske slike, ki jih dobimo iz senzorja kamere. Izhodni rezultat algoritma so centri in še nekatere druge lastnosti objektov, ki se nahajajo na vhodni sliki. Pri obdelavi slike na osebnem računalniku to vzame veliko časa in sistemske moči, na drugi strani pa imamo kamero z zmogljivim vezjem FPGA in optičnim senzorjem, ki omogoča zajemanje do 330 slik na sekundo pri polni ločljivosti. Z implementacijo algoritma na FPGA kamere bo bolje izkoriščen celoten potencial kamere in razbremenjen osebni računalnik. Paralelizacija algoritma bo skrajšala čas obdelave slike, kar bo omogočalo večje število obdelanih slik na sekundo in izračun rezultatov v realnem času.

Language:Slovenian
Keywords:FPGA, VHDL, zaznavanje objektov
Work type:Bachelor thesis/paper
Organization:FE - Faculty of Electrical Engineering
Year:2016
PID:20.500.12556/RUL-85183 This link opens in a new window
Publication date in RUL:14.09.2016
Views:1578
Downloads:641
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Secondary language

Language:English
Title:Binary large object detection with high-speed camera
Abstract:
The aim of the thesis was to convert image processing algorithm, which processes images on personal computer (PC) and is written in C programming language to digital circuit described in VHDL code. The algorithm converted to VHDL code was implemented on a programmable system on a chip, which is installed in the camera Velociraptor from the company Optomotive. Task of the algorithm is to find binary large objects (BLOBs) on image and determine their centers. The BLOBs are composed of a large number of adjacent pixels which have similar properties (brightness). The algorithm input data are raw grayscale images from the camera’s optical sensor. Output results are centers and some other features of the BLOBs, which are located on input image. Image processing on a PC takes a lot of time and system power. On the other hand, we have camera with a powerful FPGA and an optical sensor, which can capture up to 330 images per second at full resolution. By implementing the algorithm on the camera FPGA we can better use the camera and offload the PC. Parallelization of the algorithm will shorten the image processing time. This will allow processing of more images per second and real time center calculation.

Keywords:FPGA, VHDL, BLOBs

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