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Izvedba procesorskega sistema s procesorjem MPC8560 na širikopasovni naročniški enoti : magistrsko delo
ID Čadež, Borut (Author), ID Žemva, Andrej (Mentor) More about this mentor... This link opens in a new window

URLURL - Presentation file, Visit http://www.dlib.si/details/URN:NBN:SI:doc-ETICJJQF This link opens in a new window

Abstract
magistrsko delo

Language:Slovenian
Keywords:CPU system, high-speed digital design, IP DSLAM, ATM, Gigabit Ethernet, DDR SDRAM memory, MPC8560, PowerQUICC III, MA thesis
Work type:Master's thesis
Typology:2.09 - Master's Thesis
Organization:FE - Faculty of Electrical Engineering
Publisher:[B. Čadež]
Year:2008
PID:20.500.12556/RUL-54963 This link opens in a new window
UDC:621.39(043.2)
COBISS.SI-ID:238955008 This link opens in a new window
Publication date in RUL:10.07.2015
Views:1655
Downloads:273
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Secondary language

Language:Slovenian
Keywords:procesorski sistemi, hitri digitalni sistem, IP DSLAM, ATM, Gigabit Ethernet, pomnilnik DDR SDRAM, MPC8560, PowerQUICC III, magisteriji

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