Details

Statični nadzornik navideznih strojev za procesorsko arhitekturo RISC-V
ID Križman, Marko (Author), ID Mihelič, Jurij (Author)

.pdfPDF - Presentation file, Download (190,28 KB)
MD5: ED963E74C1C9EC815C436D5FA80C6FDD
URLURL - Source URL, Visit https://ev.fe.uni-lj.si/4-2026/Krizman.pdf This link opens in a new window

Abstract
V članku predstavimo razvoj in izvedbo nadzornika navideznih strojev za procesorsko arhitekturo RISC-V. Nadzornik omogoca statično razdelitev virov, pri kateri se procesorska jedra, pomnilnik in naprave navideznim strojem dodelijo ob zagonu, med delovanjem pa se ta dodelitev ne spreminja. Z ustrezno razdelitvijo virov zagotovimo medsebojno izolacijo navideznih strojev in predvidljivo delovanje, kar je kljucno pri varnostno kritičnih sistemih. Nadzornik uporablja razširitev za virtualizacijo in podpira dvostopenjsko preslikovanje naslovov, virtualizacijo serijskih naprav, emulacijo zunanjega prekinitvenega krmilnika ter paravirtualizacijo blocnih naprav prek razsvetljenega gonilnika. Delovanje smo preizkusili v emulatorju QEMU na platformi riscv64-virt v razlicnih konfiguracijah, vključno s sočasnim izvajanjem dveh navideznih strojev z operacijskim sistemom xv6, od katerih ima vsak svojo serijsko napravo, disk in emulirani prekinitveni krmilnik.

Language:Slovenian
Keywords:virtualizacija, nadzornik navideznih strojev, statična razdelitev virov, RISC-V
Work type:Article
Typology:1.01 - Original Scientific Article
Organization:FE - Faculty of Electrical Engineering
Publication version:Version of Record
Publication date:01.01.2026
Year:2026
Number of pages:Str. 171-178
Numbering:Letn. 93, št. 4
PID:20.500.12556/RUL-189977 This link opens in a new window
UDC:004.272.4:004.451.9
ISSN on article:0013-5852
COBISS.SI-ID:301549571 This link opens in a new window
Publication date in RUL:19.10.2026
Views:42
Downloads:3
Metadata:XML DC-XML DC-RDF
:
Copy citation
Share:Bookmark and Share

Record is a part of a journal

Title:Elektrotehniški vestnik
Publisher:Strokovna zadruga koncesijoniranih elektrotehnikov, Elektrotehniška zveza Slovenije
ISSN:0013-5852
COBISS.SI-ID:742916 This link opens in a new window

Licences

License:CC BY 4.0, Creative Commons Attribution 4.0 International
Link:http://creativecommons.org/licenses/by/4.0/
Description:This is the standard Creative Commons license that gives others maximum freedom to do what they want with the work as long as they credit the author.

Secondary language

Language:English
Title:Static virtual machine monitor for the RISC-V processor architecture
Abstract:
We present the development and implementation of a virtual machine monitor (VMM) for the RISC-V processor architecture. The VMM enables static resource partitioning, where processor cores, memory, and devices are assigned to virtual machines at startup and remain fixed throughout operation. Such resource partitioning ensures mutual isolation between virtual machines and predictable behavior, which is essential for safety-critical systems. The VMM leverages the hardware virtualization extension and supports two-stage address translation, virtualization of serial devices, emulation of the external interrupt controller, and paravirtualization of block devices via an enlightened driver. We evaluate the VMM on the QEMU riscv64-virt platform across several configurations, including the concurrent execution of two virtual machines running the xv6 operating system, each with a dedicated serial device, disk, and emulated interrupt controller

Keywords:virtualization, hypervisor, static resource allocation, RISC-V

Projects

Funder:ARIS - Slovenian Research and Innovation Agency
Project number:P2-0095
Name:Znanstveno računanje

Similar documents

Similar works from RUL:
Similar works from other Slovenian collections:

Collection

This document is a part of these collections:
  1. Elektrotehniški vestnik

Back