Edge devices have limited computational resources, which makes dedicated
hardware accelerators on field-programmable gate arrays (FPGAs) useful for
neural network inference. In this thesis, we developed a custom processing
unit in the CFU-Playground environment to accelerate convolution operations
of a quantized keyword spotting model. The unit is connected to the RISC-V
VexRiscv processor and contains a 4 × 4 systolic array. We transformed
the convolution operations into matrix multiplication and adapted data
preparation, layout, and reuse. The general implementation accelerated the
six evaluated convolution operators by a factor of 16.5, while the model-specific
implementation achieved a speedup of 35.7. The complete profiled inference
was accelerated by approximately 4.8 times. In both implementations, the
model outputs remained identical to the reference software implementation.
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