The thesis describes the operation of the open-source OpenVAF-Reloaded com-
piler, which compiles Verilog-A code into a dynamic library compliant with the
OSDI interface. The interface enables data exchange between the compiled mod-
ule and the circuit simulator. The compilation process is performed incrementally
at several stages.
The thesis focuses on the Verilog-A system function for retrieving the current
simulation time and its integration into the compilation process. The OSDI
interface is extended with a set of flags that allow the compiler to provide the
simulator with information about the properties of the compiled models. A flag
indicating the compiled model’s dependence on the current simulation time is
implemented.
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