This thesis presents the development of a hardware accelerator for
the analysis of Boolean models used in the modelling of gene regulatory
networks. The analysis of such models becomes computationally demanding for
larger networks due to the exponential growth of the state space. Therefore,
we investigated the use of a field-programmable gate array (FPGA) to accelerate
attractor identification.
We developed an automated system that accepts a model in the .bnet
format, generates specialised hardware description code in Verilog, and uses
the Vivado tool to synthesise and implement it on a Nexys A7-100T development
board. Floyd's tortoise and hare algorithm was implemented in hardware
to detect cyclic and fixed-point attractors. The identified attractors are
canonicalised and aggregated according to their basins of attraction. The
analysis results are transferred to the host computer through UART serial
interface.
The correctness of the hardware implementation was verified using our own
reference implementation in Python and independently using the BoolNet tool.
The system was evaluated on two biological models of different sizes. For the
ErbB model, the FPGA implementation was approximately 100 times faster than
our software implementation, while for the more demanding apoptosis model it
was approximately 133 times faster. For the latter, the FPGA implementation
was also approximately 3.2 times faster than BoolNet and successfully
identified all 97 attractors.
The results demonstrate that FPGA-based acceleration is an effective approach
for analysing medium-sized synchronous Boolean networks. The developed system
also provides a basis for further improvements, including the parallelisation
of multiple analysers, optimisation of memory organisation, and support for
larger models.
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