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Načrtovanje sistema na čipu RISC-V v tehnologiji CMOS
ID Šuligoj, Andraž (Author), ID Žemva, Andrej (Mentor) More about this mentor... This link opens in a new window, ID Pogačar, Jan (Comentor)

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Abstract
Tehnološki napredek na področju integriranih vezij je omogočil implementacijo računalniških sistemov na samostojnem čipu. Vsak računalniški sistem vsebuje centralno procesno enoto, ki ji pripada ukazna arhitektura. Večina uspešnih ukaznih arhitektur, podjetij, kot so ARM in Intel, je zaščitenih, torej je uporaba ukazne arhitekture brez licence prepovedana. Kot posledica tega je nastala pobuda za razvoj odprtokodnih arhitektur, kot je na primer RISC-V. Skozi magistrsko delo je predstavljeno načrtovanje digitalnih integriranih vezij na primeru enostavnega RISC-V sistema na čipu. V teoretičnem delu magistrske naloge so na kratko opisani splošni koraki in priporočila v procesu načrtovanja omenjenih vezij. V nadaljevanju so nato podrobneje predstavljene specifikacije, implementacijske posebnosti in verifikacija RISC-V sistema. Rezultat implementacije je sistem na čipu, ki je v trenutni fazi razvoja skladen s funkcionalnimi in električnimi specifikacijami. Ker so analogni gradniki še v procesu razvoja, so ti nadomeščeni s črnimi škatlami, zato trenutni rezultati služijo kot referenca za nadaljnje načrtovanje. V primeru uspešne izdelave bo opisana implementacija postavila temelje za kasnejše izvedbe sistema, ki bi služili kot krmilna in DSP enota znotraj namenskih integriranih vezij podjetja Renishaw d.o.o.

Language:Slovenian
Keywords:digitalno integrirano vezje, RISC-V, sistem na čipu, CMOS
Work type:Master's thesis/paper
Typology:2.09 - Master's Thesis
Organization:FE - Faculty of Electrical Engineering
Year:2026
PID:20.500.12556/RUL-178031 This link opens in a new window
COBISS.SI-ID:265430787 This link opens in a new window
Publication date in RUL:16.01.2026
Views:463
Downloads:186
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Secondary language

Language:English
Title:Designing RISC-V System-on-a-Chip in CMOS Technology
Abstract:
Technological advancements in the field of integrated circuits allowed for implementations of computer systems on standalone chips. Every computer system includes a central processing unit with a defined instruction set architecture. Most of the succesful instruction set architectures, developed by companies such as ARM and Intel, are protected; therefore, their use is prohibited without a license. As a result, an initiative was launched to develop open-source architectures, such as RISC-V. Throughout the thesis, the design process of a digital integrated circuit is presented using the example of a RISC-V system on a chip. Theoretical part of the thesis describes general steps and recommendations of the digital design flow. In the following, the specifications, implementation details and verification of the RISC-V system are presented in more detail. The result of the implementation is a system on a chip, which at the current design phase, satisfies all functional and electrical specifications. Due to the ongoing design process of the analog building blocks, they have been replaced with black boxes; therefore, the current implementation results serve as a reference for further design. If succesfully produced, the described implementation will serve as a foundation for future designs, which will be used for control and DSP purposes, inside of Renishaw's application specific integrated circuits.

Keywords:digital integrated circuit, RISC-V, system on a chip, CMOS

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