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Učinkovitost QEMU emulatorja za RISC-V arhitekturo
ID Zevnik, Filip (Author), ID Tuma, Tadej (Mentor) More about this mentor... This link opens in a new window

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Abstract
Naraščajoča potreba po hitrem prototipiranju v kombinaciji z visokimi stroški specializiranih razvojnih platform in motnjami v dobavnih verigah je v zadnjem času spodbudila povečano zanimanje za uporabo emulacijskih rešitev pri razvoju vgrajenih sistemov. Osrednji namen te naloge je bila podrobna in sistematična evalvacija zmogljivosti odprtokodnega emulatorja QEMU pri emulaciji arhitekture RISC-V. Glavni raziskovalni cilj je bil ugotoviti stopnjo, do katere QEMU natančno posnema delovanje realnega sistema RISC-V, in analizirati vpliv njegove uporabe na hitrost ter učinkovitost celotnega razvojnega procesa. Metodološki pristop je vključeval obsežno primerjalno analizo hitrosti izvajanja različnih algoritmov na virtualni platformi QEMU ter fizični razvojni plošči. Dodatno je bila izvedena verifikacija pravilnosti izvajanja prekinitev in zaznavanja napak (angl. faults). Vsi testi in meritve so bili izvedeni z uporabo specializiranih orodij podjetja TASKING, vključno z integriranim razvojnim okoljem winIDEA, s programom za avtomatizirane teste fitIDEA ter knjižnico winIDEA SDK. Raziskava je potrdila, da prinaša uporaba emulatorja QEMU za merjenje računske zmogljivosti in obnašanja kode določene kompromise med natančnostjo ter zmogljivostjo. Kljub temu so se virtualni emulatorji izkazali kot privlačna in učinkovita alternativa v scenarijih testiranja programske opreme. Uporaba QEMU je omogočila poenostavitev postopkov in pospešitev izvajanja testov brez neposredne odvisnosti od fizične strojne opreme, kar bistveno izboljša razvojni proces.

Language:Slovenian
Keywords:QEMU, RISC-V, emulacija, vgrajeni sistemi, hitrost izvajanja
Work type:Master's thesis/paper
Typology:2.09 - Master's Thesis
Organization:FE - Faculty of Electrical Engineering
Year:2025
PID:20.500.12556/RUL-173655 This link opens in a new window
COBISS.SI-ID:257862147 This link opens in a new window
Publication date in RUL:19.09.2025
Views:456
Downloads:170
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Secondary language

Language:English
Title:QEMU emulator efficiency in RISC-V architecture
Abstract:
The increasing need for rapid prototyping coupled with the high cost of specialized hardware development platforms and supply chain disruptions has stimulated a significant interest in emulation solutions for embedded system development. This thesis presents a detailed evaluation of the performance of the open-source QEMU emulator for the RISC-V architecture. The primary research objective was to determine the extent to which QEMU accurately emulates the behavior of a real RISC-V system and to analyze the impact of its use on the overall speed and efficiency of the development process. The methodological approach involved a comprehensive comparative analysis of algorithm execution speeds. These benchmarks were executed on both the QEMU virtual platform and a physical development board. Additionally, the correctness of interrupt handling and fault detection was thoroughly verified. All tests and measurements were conducted using specialized tools from TASKING, including the winIDEA integrated development environment, the fitIDEA automated testing tool, and the winIDEA SDK. The study confirmed that using the QEMU emulator for measuring computational performance and code behavior involves a trade-off between accuracy and performance. Nonetheless, virtual emulators proved to be a compelling and efficient alternative for software testing scenarios. The use of QEMU was shown to simplify procedures and accelerate test execution, significantly improving the development workflow by reducing the reliance on physical hardware.

Keywords:QEMU, RISC-V, emulation, embedded systems, execution speed

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