Details

FUNKCIJSKI GENERATOR Z NEPOSREDNO DIGITALNO SINTEZO PODATKOV V FPGA VEZJU
ID Tomažič, Uroš Anže (Author), ID Možek, Matej (Mentor) More about this mentor... This link opens in a new window

.pdfPDF - Presentation file, Download (3,39 MB)
MD5: 4FE44FEA1C56CE3BD50ADFC364A678F9

Abstract
V diplomskem delu je predstavljen razvoj funkcijskega generatorja, ki temelji na metodi neposredne digitalne sinteze (DDS), implementirani v FPGA vezju. Sistem omogoa tvorbo razlinih signalnih oblik s prilagodljivimi parametri, kot so frekvenca, amplituda, enosmerni zamik in faza. Glavni digitalno-analogni (DA) pretvornik skrbi za pretvorbo digitalno generiranih signalov v analogno obliko, dodatni trije DA-pretvorniki pa omogoajo nastavitev ojaenja in enosmernega zamika izhodnega ojaevalnika. Uporabnibki vmesnik temelji na mikrokrmilniku STM32, ki upravlja periferijo, prikazuje parametre na zaslonu ter omogoa shranjevanje podatkov v EEPROM. Zasnova vkljuuje tudi izhodni ojaevalni sklop, ki zagotavlja zadostno mo in kakovost signala. Delovanje sistema je bilo preverjeno s simulacijami in meritvami, ki so potrdile ustrezno funkcionalnost in stabilnost. Razvita rebitev dokazuje, da je mogoe s kombinacijo FPGA in DDS metode izdelati modularen in razbirljiv funkcijski generator, ki je po lastnostih primerljiv s komercialnimi napravami.

Language:Slovenian
Keywords:Funkcijski generator, DDS, STM32, FPGA, DAC
Work type:Bachelor thesis/paper
Typology:2.11 - Undergraduate Thesis
Organization:FE - Faculty of Electrical Engineering
Year:2025
PID:20.500.12556/RUL-172530 This link opens in a new window
COBISS.SI-ID:249350147 This link opens in a new window
Publication date in RUL:08.09.2025
Views:583
Downloads:157
Metadata:XML DC-XML DC-RDF
:
Copy citation
Share:Bookmark and Share

Secondary language

Language:English
Title:DIRECT DIGITAL SYNTHESIS BASED FUNCTION GENERATOR IN FPGA
Abstract:
This thesis presents the development of a function generator based on Direct Digital Synthesis (DDS), implemented on an FPGA. The system is capable of generating various waveform shapes with adjustable parameters such as frequency, amplitude, and DC offset. The main digital-toanalog converter is responsible for converting digitally generated signals into analog form, while three additional DACs are used to control the gain and DC offset of the output amplifier stage. User interface is managed by an STM32 microcontroller, which also handles peripheral control, parameter display on the screen, and data storage to EEPROM. The design also integrates an output amplifier that provides sufficient output power and high signal quality. System functionality was verified through simulations and measurements, confirming its correct operation and stability. Developed solution demonstrates that combining FPGA technology with the DDS method allows creation of a modular and extendable function generator that is comparable to commercial devices in terms of performance.

Keywords:Function Generator, DDS, STM32, FPGA, DAC

Similar documents

Similar works from RUL:
Similar works from other Slovenian collections:

Back