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Free software support for compact modelling with Verilog-A
ID Bürmen, Arpad (Author), ID Tuma, Tadej (Author), ID Fajfar, Iztok (Author), ID Puhan, Janez (Author), ID Rojec, Žiga (Author), ID Kunaver, Matevž (Author), ID Tomažič, Sašo (Author)

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Abstract
Verilog-A is the analog subset of Verilog-AMS - a hardware description language for analog and mixed-signal systems. Verilog-A is commonly used for the distribution of compact models of semiconductor devices. For such models to be usable a Verilog-A compiler is required. The compiler converts the model equations into a form that can be used by the simulator. Such compilers have been supplied with commercial simulators for many years now. Free software alternatives are much more scarce and limited in the features they offer. The paper gives an overview of Verilog-A, Free software Verilog-A compilers, and Free software/Open source simulators that can simulate compact models defined in Verilog-A. Advantages and disadvantages of individual compilers and simulators are highlighted.

Language:English
Keywords:hardware description langugage, Verilog-A, analog circuits, circuit simulation, compact models
Work type:Article
Typology:1.01 - Original Scientific Article
Organization:FE - Faculty of Electrical Engineering
Publication status:Published
Publication version:Version of Record
Year:2024
Number of pages:17 str.
Numbering:Vol. 54, no. 4
PID:20.500.12556/RUL-165256 This link opens in a new window
UDC:004.43
ISSN on article:2232-6979
COBISS.SI-ID:216529411 This link opens in a new window
Publication date in RUL:28.11.2024
Views:525
Downloads:106
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Record is a part of a journal

Title:Informacije MIDEM
Publisher:MIDEM
ISSN:2232-6979
COBISS.SI-ID:264503552 This link opens in a new window

Licences

License:CC BY 4.0, Creative Commons Attribution 4.0 International
Link:http://creativecommons.org/licenses/by/4.0/
Description:This is the standard Creative Commons license that gives others maximum freedom to do what they want with the work as long as they credit the author.

Secondary language

Language:Slovenian
Keywords:jezik za opisovanje strojne opreme, Verilog-A, analogna vezja, simulacija vezij, kompaktni modeli

Projects

Funder:ARIS - Slovenian Research and Innovation Agency
Project number:P2-0246
Name:ICT4QoL - Informacijsko komunikacijske tehnologije za kakovostno življenje

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