izpis_h1_title_alt

Implementacija prilagodljivega analizatorja razhroščevalnega protokola v logičnem analizatorju Saleae
ID Hamzić, Faruk (Author), ID Logar, Vito (Mentor) More about this mentor... This link opens in a new window

.pdfPDF - Presentation file, Download (3,58 MB)
MD5: BD2342BBD581A94A3129BBCBFD6BBA88

Abstract
Diplomsko delo predstavlja implementacijo analizatorja, ki je bil razvit za potrebe podjetja iSYSTEM Labs. Podjetje se ukvarja z razvojem strojne in programske opreme, ki med drugim pomaga pri razhroščevanju mikrokrmilnikov. iSYSTEM v svoji opremi ponuja podporo za različne družine mikrokrmilnikov, vsaka od njih pa vsebuje vmesnike za razhroščevanje, ki temeljijo na različnih protokolih. Eden od teh protokolov temelji na sinhroni serijski komunikaciji, zato smo se v podjetju odločili, da razvijemo analizator, ki bo namenjen temu protokolu. Za analizo številnih vrst komunikacij v podjetju uporabljamo logični analizator Saleae, zato smo se odločili za razvoj analizatorja v njegovem okolju. V prvem delu diplomske naloge bomo teoretično obdelali sam proces razhroščevanja in opisali komunikacije, ki se uporabljajo pri tem procesu. Pri tem bomo definirali nekaj splošnih delov komunikacije, na podlagi katerih bomo razvili naš analizator. Nato bomo opisali strojno in programsko opremo, s katero smo zajeli samo komunikacijo in implementirali analizator. Na koncu bomo opisali implementacijo samega analizatorja protokola. Analizator je namreč v celoti razvit v programskem jeziku ''C++'', zato bomo izvedbo predstavili s blokovnimi diagrami in deli kode.

Language:Slovenian
Keywords:razhroščevanje, protokol, logični analizator, analizator protokola, Saleae
Work type:Bachelor thesis/paper
Organization:FE - Faculty of Electrical Engineering
Year:2023
PID:20.500.12556/RUL-153110 This link opens in a new window
COBISS.SI-ID:178512899 This link opens in a new window
Publication date in RUL:18.12.2023
Views:677
Downloads:78
Metadata:XML DC-XML DC-RDF
:
Copy citation
Share:Bookmark and Share

Secondary language

Language:English
Title:Implementation of an adjustable debugging protocol analyzer in Saleae logic analyzer
Abstract:
The thesis represents the implementation of the analyzer, which was developed for the needs of iSYSTEM Labs. This company develops hardware and software that helps in debugging microcontrollers, among other things. In its hardware, iSYSTEM offers support for different families of microcontrollers, each of which contains debugging interfaces based on different protocols. One of these protocols is based on synchronous serial communication, and in the company we decided to develop an analyzer dedicated to this protocol. To analyze many types of communications, the company uses the Saleae logic analyzer, which is why we decided to develop the analyzer in its environment. In the first part of the thesis, we will theoretically cover the debugging process itself and describe the communications used in this process. Here we will define some general parts of communication, on the basis of which we will develop our analyzer. Next, we will describe the hardware and software with which we captured the communication itself and implemented the analyzer. And finally, we will describe the implementation of the protocol analyzer itself. Namely, the analyzer is fully developed in the programming language "C++", so we will present the implementation with block diagrams and parts of the code.

Keywords:debugging, protocol, logic analyzer, protocol analyzer, Saleae

Similar documents

Similar works from RUL:
Similar works from other Slovenian collections:

Back