In this thesis I was working on the implementation of a data acquisition system.
The goal was to program the FPGA chip, located on the DAQ card, design a pro-
gram for data transfer via USB connection and storing said data on the computer.
DAQ card is required to read all of the 9 analogue inputs simultaneously, collect
the readings, store them in a serial string and transfer them via USB protocol to the computer. Sampling frequency of the system is equal to fs = 1 MHz. The FPGA program is written in a hardware description language (HDL) verilog. The control system consists of four modules. One is responsible for controlling the 9 AD converters, one serves as an internal FIFO buffer of the FPGA chip, where we temporarily store converted data from AD converters. Another module controls the FTDI chip, which is in charge of communication and
transmission of data to the computer. The top module manages and controls the
other modules.
AD converters use SPI protocol in order to communicate with the FPGA chip,
which means that the module controlling them must follow timing requirements
consistently, as described in the timing diagram, which can be found in the data-sheet [1].
The FIFO buffer serves as a temporary storage space for data of all nine AD converters. Reading from the buffer is done while the sampled data is being converted.
The FTDI chip, located on the PCB, serves as an interface between the FPGA and the computer. It also contains an internal FIFO buffer, where we store data before transmission to the computer. Data transmission is one-way (FTDI → PC), therefore the FTDI chip needs to provide information only about the state
of the transfer buffer on the chip.
The top module provides a clock signal to all nine AD converters. It is responsible for starting the whole data acquisition process with periodic trigger signal of 1 MHz. It manages the control signals of the FPGA FIFO buffer and sends data to the input of the FTDI-chip.
There needs to be some kind of program running on the PC to transfer and store data from the FPGA chip. The program is written in a programming language C++, with the help of FTD3XX.h library that supports communication with the FTDI chip. For that to work we also need to install the D3XX Direct driver. The program consists of three functions. In int main we first call the function get device info(void), which provides information about connected
D3XX-devices. The FTDI chip provides a clock signal to the whole FPGA circuit, so we need to configure the chip accordingly, which is done with the function call SetChipConfiguration(void). After configuration is completed, data can be successfully transferred and stored on the drive as a text file.
The text file is then converted from a hexadecimal system to a decimal system. The values are calculated to voltages with the help of the transfer function of AD converters. The data is then separated into nine arrays, each corresponding to one AD converter.
The card was tested with a sine wave of 10 kHz frequency. The signal was successfully transferred, read and graphically represented. It was also tested with a square wave with a frequency of 1 kHz and with triangular wave with a frequency of 500 Hz. An offset voltage was added to the triangular wave. Both of these signals were successfully read and graphically represented.
|
