Zasnova in izvedba emulatorja namenskega integriranega vezja MIS

HRUŠOVAR, MATIJA (author), Žemva, Andrej (mentor)

V diplomskem delu je predstavljen razvoj emulatorja namenskega integriranega vezja MIS53 oz. MIS56. Vezje se uporablja v zvezi z absolutnimi dajalniki pozicije oziroma enkoderji. Sistem enkoderja poleg vezja MIS sestavljata še mikrokrmilnik in namagneteni obroč. Vezje MIS53 oz. MIS56 temelji na Hallovih senzorjih, ki podatke o namagnetenosti obroča pretvarjajo v napetost, kar se prenaša v podatek o poziciji. Mikrokrmilnik podatke, pridobljene iz vezja MIS, obdela, pretvarja in pošilja napravi, ki z njim komunicira Za omenjene funkcionalnosti se razvija programska oprema, ki teče na teh mikrokrmilnikih. Z razvojem programov pride tudi do testiranja le-teh. Za testiranje programov na takšnem sistemu je potrebna priprava testnega okolja skupaj s pripravo magnetnega ringa in vezja MIS. Ker je delovanje vezja MIS občutljivo in nanj vpliva veliko dejavnikov, se je zanj razvil emulator, ki emulira njegovo delovanje. Emulator sem realiziral na razvojni plošči Red Pitaya. Na njej sem implementiral tako digitalno logiko v FPGA delu kot tudi programsko kodo v procesorskem delu čipa. Za njo se bo v nadaljnje razvila tudi razširitvena ploščica, s katero bo možna realna emulacija delovanja vezja MIS, vendar v času pisanja diplomskega dela še ni izdelana. Razvoj emulatorja bo prispeval k lažjemu testiranju programov, ki tečejo na mikrokrmilnikih, in iz sistema testiranja enkoderja izločil tako vezje MIS kot tudi namagneteni obroč. Z emulatorjom bodo razvijalci programov bistveno poenostavili testiranje. Imeli bodo ponovljiv in zanesljiv vzorec emulacije vrtenja namagnetenega ringa in s tem pohitrili testiranje.

• Language: Slovenian
• Keywords: emulator, mikrokrmilnik, FPGA, Red Pitaya, MIS53 (56)
• Work type: Bachelor thesis/paper
• Organization: FE - Faculty of Electrical Engineering
• Year: 2022
• PID: 20.500.12556/RUL-137778
• COBISS.SI-ID: 113416963
• Publication date in RUL: 30.06.2022

HRUŠOVAR, MATIJA, 2022, Zasnova in izvedba emulatorja namenskega integriranega vezja MIS [online]. Bachelor’s thesis. [Accessed 25 April 2025]. Retrieved from: https://repozitorij.uni-lj.si/IzpisGradiva.php?lang=eng&id=137778

Secondary language

• Language: English
• Title: Design and implementation of ASIC MIS emulator

Abstract

The diploma thesis presents the development of an emulator of an application-specific integrated circuit MIS53 or MIS56. The circuit is used in connection with absolute position encoders. In addition to the MIS circuit, the encoder system also consists of a microcontroller and a magnetic ring. The MIS53 or MIS56 circuit (differs only in number of Hall sensors) is based on Hall sensors that convert ring magnetization data into voltage data, which is then transformed to the position data. The microcontroller processes, converts and transmits the data obtained from the MIS circuit to the device that communicates with it. The software running on these microcontrollers (firmware) is developed for the mentioned functionalities. The development of firmware also includes its testing. Testing programs on such a system requires the preparation of a test environment together with the preparation of the magnetic ring and the MIS circuit. Since the operation of the MIS circuit is sensitive and influenced by many factors, an emulator was developed to emulate its operation. The emulator was realized on the Red Pitaya development board. It served as the basis for the implementation of both, the digital logic in the FPGA part as well as the program code in the processor part of the chip. An expansion board will be further developed, which will allow a real emulation of the operation of the MIS circuit, however, it has not been developed yet at the time of writing the thesis. The development of the emulator presented in the thesis will facilitate the testing of programs running on microcontrollers and eliminate both the MIS circuit and the magnetic ring from the encoder testing system. With the emulator, firmware developers will significantly simplify the testing. They will obtain a repeatable and reliable pattern of emulation of the rotation of the magnetized ring, and therefore be able to speed up the testing.

• Keywords: emulator, microcontroller, FPGA, Red Pitaya, MIS53 (56)