The aim of the thesis is to create a colour image pipeline for Zynq UltraScale+ MPSoC families. The purpose is to present each core in the pipeline and present its operation and results. The presented pipeline consists of several cores. At the beginning of the pipeline, there is a core for eliminating dead pixels that appear on the image sensor. The following is a core for eliminating fixed patterns in an image that can work in noise mode or in mode for correcting two dimensional shapes. It is followed by an image contrast core, which is implemented using look-up tables. The sensor data is in monochromatic form, but if the sensor supports a colour image it must be assembled with a demosaic process. Demosaic core converts Bayer pattern to colour image. The algorithm used is currently one of the best and is optimized for operation on FPGA circuits. At the end of the pipeline, there is a core, which converts the colour format required for JPEG compression.
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