Cevovod za obdelavo barvnih slik na hitri kameri z vezjem FPGA

FALETIČ, BOJAN (author), Trost, Andrej (mentor)

Cilj diplomske naloge je izdelava cevovoda za barvno sliko za Zynq UltraScale+ MPSoC družine. Namen je predstaviti vsako jedro v cevovodu in predstaviti njegovo delovanje ter rezultate. Predstavljen cevovod sestavlja več jeder. Na začetku cevovoda je jedro za odpravljanje mrtvih pikslov, ki se pojavljajo na slikovnem senzorju. Sledi jedro za odpravo fiksnih vzorcev na sliki, ki lahko deluje v načinu za izravnavo odmikov posameznih stolpcev v sliki. Sledi mu jedro za nastavljanje kontrasta slike, ki je izvedeno z vpoglednimi tabelami. Podatki senzorja so v monokromatski obliki, če pa senzor podpira barvno sliko, jo je potrebno sestaviti z jedrom za demozaik. Jedro za demozaik slike pretvori Bayerjev vzorec v barvno sliko. Uporabljen algoritem je eden izmed najboljših in je optimiziran za delovanje na FPGA vezjih. Na koncu cevovoda je jedro za pretvorbo barvnega formata potrebnega za JPEG stiskanje

• Language: Slovenian
• Keywords: FPGA, Zynq UltraScale+, obdelava slike
• Work type: Bachelor thesis/paper
• Organization: FE - Faculty of Electrical Engineering
• Year: 2019
• PID: 20.500.12556/RUL-110187
• Publication date in RUL: 12.09.2019

Secondary language

• Language: English
• Title: Pipeline for color image processing on high-speed FPGA camera

Abstract

The aim of the thesis is to create a colour image pipeline for Zynq UltraScale+ MPSoC families. The purpose is to present each core in the pipeline and present its operation and results. The presented pipeline consists of several cores. At the beginning of the pipeline, there is a core for eliminating dead pixels that appear on the image sensor. The following is a core for eliminating fixed patterns in an image that can work in noise mode or in mode for correcting two dimensional shapes. It is followed by an image contrast core, which is implemented using look-up tables. The sensor data is in monochromatic form, but if the sensor supports a colour image it must be assembled with a demosaic process. Demosaic core converts Bayer pattern to colour image. The algorithm used is currently one of the best and is optimized for operation on FPGA circuits. At the end of the pipeline, there is a core, which converts the colour format required for JPEG compression.

• Keywords: FPGA, Zynq UltraScale+, image processing