Razhroščevalna enota za učni mikroprocesor

TUHTAR, PETER (author), Trost, Andrej (mentor)

Za izbrano razvojno ploščo DE0-Nano in zanjo posebej razvito razširitveno ploščo smo izdelali rešitev, ki nam omogoča razhroščevanje programske opreme procesorja v vezju FPGA. Razširili smo osnovno predlogo sistema, ki se uporablja pri vajah Laboratorija za načrtovanje integriranih vezij (LNIV). Predloga sistema vključuje 12 bitni učni procesor, ki ni imel enote za razhroščevanje. Enoto za razhroščevanje smo opisali jeziku v VHDL. Uporabili smo programsko opremo Intel Quartus, ModelSim in PuTTY. Naloga razhroščevalne enote je nadzor nad delovanjem procesorja in pridobitev podatkov o stanju. Za povezavo z računalnikom uporabljamo odprtokodni zaporedni vmesnik, ki ga je bilo potrebno povezati z vodilom razširitvene plošče in testirati ob delovanju vseh periferij na tem vodilu. Nadgrajevanje je v nadaljevanju predstavljala interpretacija prejetih znakov, ki je zahtevala nadgradnjo procesorskega vezja. Z dogovorjenimi znaki za ukaze smo določili katere funkcije bomo uvedli v naš sistem. Tako smo za vplivanje na delovanja procesorja za ponovni zagon določili znak »r«, za zaustavitev delovanja procesorja znak »s«, omogočanje delovanja procesorja »e« in izvajanje ukazov v procesorju po korakih znak »k«. Uvedli smo še dva znaka za pridobitev podatkov o stanju delovanja procesorja, ki sta »a« za pridobitev vrednosti akumulatorja in znak »p« za pridobitev vrednosti programskega števca. Končni izdelek predstavlja rešitev, s katero smo realizirali vse zadane cilje.

• Language: Slovenian
• Keywords: DE0-Nano, strojna oprema, razhroščevanje, LNIV, VHDL, Quartus, ModelSim, PuTTY, komunikacija
• Work type: Bachelor thesis/paper
• Organization: FE - Faculty of Electrical Engineering
• Year: 2018
• PID: 20.500.12556/RUL-99794
• Publication date in RUL: 16.02.2018

Secondary language

• Language: English
• Title: Debugging unit for educational microprocessor

Abstract

We build a debugging solution for chosen development board DE0-Nano and for it especially developed extension board. Our solution enables us to debug software written for hardware processor in an FPGA device. We extended template system used for tutorials in the Laboratory for integrated circuits design (LNIV). The system includes 12 bit educational processor, which lacks a debugging unit. The debugging unit is described in VHDL language. Software that we used are Intel Quartus, ModelSim and PuTTY. Function of debugging unit is control over processor operation capabilities and getting information of its state. We are using open source serial interface to connect it with a computer. We had to connect the interface with a bus of extension board and test it while all other periphery are using this bus as well. Next step was to interpret the data that we received through serial interface. For that reason we had to upgrade microprocessor unit. With set of commands that we chose we also determined what functions we would implement into our system. In the process we chose to use sign “r” to reset processor, to stop it with a sign ”s”, to enable it with “e” and to make it work in a step-by-step with “k”. We implemented as well commands to extract some data of processor state. To get a value of accumulator we send a sign “a” an for the program counter (PC) we chose “p”. Final product of work presents a solution that covers all the goals set at the beginning.

• Keywords: DE0-Nano, hardware, debugging, LNIV, VHDL, Quartus, ModelSim, PuTTY, communication