Rekonfiguracija strojne opreme v času izvajanja

Škvorc, Urban (author), Bulić, Patricio (mentor), Biasizzo, Anton (co-mentor)

Rekonfiguracija v času izvajanja omogoča spreminjanje dela FPGA vezja brez prekinitve delovanja ostalih delov sistema. Takšen način rekonfiguracije omogoča številne prednosti, kot so zmanjšanje prostorske porabe, pohitritev FPGA sistemov in odpravljanje napak med delovanjem sistema. V magistrski nalogi bomo najprej predstavili rekonfiguracijo v času izvajanja in njene prednosti. Sistemi, ki uporabljajo rekonfiguracijo v času izvajanja si delijo skupne lastnosti. Te vključujejo statični del, ki se med izvajanjem ne spreminja in skrbi za rekonfiguracijo in komunikacijo z ostalimi komponentami sistema. V glavnem delu magistrske naloge bomo predstavili razvito strojno platformo, ki razvijalcem nudi te skupne lastnosti. Razvita platforma poleg rekonfiguracije podpira tudi komunikacijsko vodilo PCIe. S tem je omogočena uporaba FPGA sistema kot koprocesor v večjem strojnem sistemu. Platforma vključuje tudi gonilnik in aplikacije, ki omogočajo enostavno uporabo FPGA vezja kot koprocesor v računalniškem sistemu, ki uporablja operacijski sistem Ubuntu.

• Language: Slovenian
• Keywords: FPGA, Računalniška vezja, Rekonfiguracija
• Work type: Master's thesis/paper
• Organization: FRI - Faculty of Computer and Information Science
• Year: 2017
• PID: 20.500.12556/RUL-96725
• Publication date in RUL: 12.10.2017

Secondary language

• Language: English
• Title: Runtime hardware reconfiguration

Abstract

Runtime hardware reconfiguration allows developers to change a part of an FPGA system while it is running. This method of reconfiguration provides several advantages. These include reducing the space consumption of a FPGA system or increasing configuration speed. Another benefit is the ability of such a system to repair certain errors while it is running. In this thesis, we will first describe runtime reconfiguration and its advantages. FPGA systems that use runtime reconfiguration share several features. These include a non-changing static part that is in charge of the reconfiguration process, as well as of communicating with other system components. The main part of the thesis will be focused on the development of a hardware platform that aims to provide developers with some of those shared features. In addition to allowing runtime reconfiguration, the developed platform also provides support for the PCIe bus, which allows the FPGA system to be used as a coprocessor in a larger hardware system. Specifically, the developed platform includes a driver and software applications that allow the FPGA system to be used as a coprocessor in a computer system running the Ubuntu operating system.

• Keywords: FPGA, Computer circuits, Reconfiguration