FPGA implementacija osnovnega cevovoda kodirnika video kodeka Daala

KRAGELJ, PETER (author), Šter, Branko (mentor)

Prikazovanje video vsebin nas spremlja skorajda na vsakem koraku - od TV oddaj na televizijskih sprejemnikih, video vsebin na internetu do celovečernih filmov v kinodvoranah. Zato ni presenetljivo, da se je skozi zgodovino računalništva razvila množica različnih kodirnikov videa, ki so doprinesli k novostim v procesiranju video vsebin. Video kodirnik Daala je eden izmed novejših video kodirnikov, ki so še v stopnji razvoja. Prinaša nov razvoj video kompresije z izbiro nestandardnih algoritmov za procesiranje. Za prehod v frekvenčno domeno uporablja Haarovo preslikavo in diskretno kosinusno transformacijo (DCT) s prekrivajočimi bloki, za kodiranje izhodnih podatkov pa podvrsto aritmetičnega kodiranja. V tem magistrskem delu je bila zasnovana in izvedena implementacija osnovnega cevovoda video kodirnika Daala. Namen dela je bil ugotavljanje zmožnosti implementacije in iskanje morebitnih pomanjkljivosti kodirnika Daala. Implementacija je bila osnovana za uporabo na čipu FPGA, kjer je bila tudi praktično preizkušena. Sama implementacija je bila uspešno dokončana. Ugotovili smo, da uporablja predvideno število virov na čipu FPGA, vendar pri tem ne dosega želenih hitrosti, predvsem zaradi neoptimalne izvedbe. Izkazalo se je, da je osnovni cevovod kodirnika Daala primeren za uporabo na čipih FPGA, saj ne vsebuje gradnikov, ki jih ni mogoče implementirati. Pri tem so se pokazale tudi določne omejitve - algoritmi potrebujejo za svoje delovanje podatke iz celotnega bloka, zato je potebno shraniti podatke tega bloka med posameznimi koraki cevovoda. Kodirnik Daala je še vedno v fazi razvoja in še ni pripravljen za splošno uporabo, saj določene funkcionalnosti ne delujejo. Razbitje superbloka na bloke brez uporabe optimizacije RDO (Rate-distortion optimization) ne deluje, saj se razvoj kodirnika trenutno izvaja samo z uporabo optimizacije RDO. Ravno tako razvoj aritmetičnega kodiranja ni zaključen, zato je na voljo preveliko število metod kompresije, kar po nepotrebnem zaplete implementacijo. V tem delu predstavljena implementacija osnovnega kodirnika video kodeka Daala dokazuje možnost njegove praktične implementacije in je prvi korak k polni in bolj optimizirani različici implementacije, ki bi bila primerna tudi za splošno uporabo.

• Language: Slovenian
• Keywords: osnovni cevovod, kodirnik, video, Daala, implementacija, Haarova preslikava, aritmetično kodiranje
• Work type: Master's thesis
• Organization: FRI - Faculty of Computer and Information Science
• Year: 2016
• PID: 20.500.12556/RUL-85572
• Publication date in RUL: 16.09.2016

Secondary language

• Language: English
• Title: FPGA implementation of basic pipeline encoder of video codec Daala

Abstract

Almost everyone in the world uses video compression many times each day - whether when watching show on TV, clips on the Internet or movies at the cinema. So it is not a surprise that through the history of computer science a number of different video codecs have been developed, each bringing some novel approaches to video processing. Daala video codec is one of the newest video codecs still in development. It is important as it uses nonstandard algorithms for video processing. It uses the Haar transform and the DCT lapped transform for crossing into frequency domain and type of arithmetic coding for coding of output data. In this work a hardware implementation of basic pipeline of video codec Daala has been developed. The aim of this work was to study possibilities of such implementation and to find possible shortcomings. Implementation has been prepared for FPGA chip where it was tested. The implementation has been finalized and has been found to use appropriate number of FPGA resources, but does not meet intended speed because of sub-optimal implementation. It has been showen that basic pipeline of video codec Daala is appropriate for usage in FPGA chips as it does not use building blocks that are impossible to implement in hardware. It has been also showen that there are some limitations. Algorithms need full data of the whole superblock to function, so all data need to be stored for each step of the pipeline. Video codec Daala is still in development and such not appropriate for the general usage as some functions of the codec are not working. Splitting of superblock into blocks is not working if RDO optimization is disabled as current development is using this optimization. Development of arithmetic coding is also not finished because of this large number of compression methods that are available and which complicate implementation. This implementation of basic pipeline of video codec Daala confirms possibility of its practical implementation and is a first step to full and more optimized implementation that would be appropriate for general usage.

• Keywords: basic pipeline, encoder, video, Daala, implementation, Haar transform, arithmetic coding