Video vmesnik za razvojno ploščo z vezjem FPGA

ŠTEFANIČ, MATEJ (avtor), Trost, Andrej (mentor)

Cilj diplomske naloge je zajem video signala v realnem casu s pomocjo analogne video kamere, njegova pretvorba v digitalno obliko ter prikaz na racunalniskem zaslonu velikosti 800 x 600 slikovnih elementov. Osnova za delovanje je nacrtano in izdelano vezje, ki zajema analogni video signal, ga pretvori v digitalni signal in nato v realnem casu prikaze na zaslonu. Vezje je nacrtano na osnovi video dekoderja proizvajalca Texas Instruments TVP5150am1, za nadaljnjo obdelavo video signala in pretvorbo med barv- nima prostoroma iz YCbCr v RGB pa je uporabljen cip FPGA proizvajalca Xilinx XC3S50A iz druzine Spartan-3A. V nadaljevanju je za video pomnilnik uporabljena razvojna plosca DE0-Nano proizvajalca Altera, za nastavljanje vrednosti registra v dekoderju pa Arduino Nano. Programska koda za ob- delavo video signala in za video pomnilnik je napisana v jeziku VHDL, za nastavljanje vrednosti registra pa v programskem jeziku C.

• Jezik: Slovenski jezik
• Ključne besede: vmesnik PAL, analogni in digitalni video signal, ITU- BT.656, video RAM, video dekoder, VHDL, DE0-NANO, Arduino Nano.
• Vrsta gradiva: Diplomsko delo
• Organizacija: FE - Fakulteta za elektrotehniko
• Leto izida: 2016
• PID: 20.500.12556/RUL-83463
• Datum objave v RUL: 15.06.2016

Sekundarni jezik

• Jezik: Angleški jezik
• Naslov: Video interface for FPGA development board

Izvleček

The goal of this Diploma thesis is to capture a color video with the help of analog video camera and convert it to digital video and nally display video in real time on a computer screen with resolution of 800 x 600 pixels. The circuit is designed and implemented on the basis of video decoder of a Texas Instruments TVP5150am1 manufacturer. For further analysis and implementation of the video signal and the conversion between color spaces from YCbCr into RGB the Xilinx XC3S50A FPGA chip from the family of Spartan-3A FPGA chips was used. For video memory a development board DE0-Nano of Altera manufacturer and for setting values in the decoder register Arduino Nano were used. While program code for the capture of a video signal and for the video memory is written in VHDL language, the program code for setting values in the register is written in C programming language.

• Ključne besede: PAL interface, analog and digital video signal, ITU-BT.656, video RAM, video decoder, VHDL, DE0-NANO, Arduino Nano.