This master's thesis presents the design and development of a device for an application-specific integrated circuit (ASIC) testing in production. The tested circuit will be used in conjunction with magnetic position sensors, incorporating a magnetoresistive sensor.
Firstly the thesis addresses theory of the integrated circuit tests, the reasons for tests, and the methods used for integrated circuits testing. Then it focuses on the tested integrated circuit and the testing procedures, which define the development and architecture requirements for the test device.
The tested ASIC includes self-testing structures and other elements to facilitate and accelerate testing. Therefore, the theoretical part of thesis is focused on the test structures in the chip. These structures are integrated into the ASIC using electronic design automation (EDA) tools that employ automatic test pattern generation (ATPG) algorithms to create test code for logic testing based on selected fault models. The generated test code is usually executed by ATE devices in wafer sort step, which effectively differentiate between good and bad ASICs already on Silicon wafer. Since commercial equipment is too expensive and functionally redundant for small-scale ASIC production, the second part of the thesis presents the development of a simplified and affordable test device capable of executing this test code.
The developed test device is significantly less complex and more economical than commercial equipment. It will contribute to the ASIC effective testing and will also serve as a solid foundation for future mixed-signal ASIC testing.
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