In the master’s thesis, we discuss asynchronous sequential circuits and their implementation on FPGA. We summarize the theoretical background of asynchronous circuits and models used to ensure their correct operation. Then asynchronous circuit design principles are described and various methods of asynchronous data transmission and processing are listed and analized. We also explain the differences in the high level asynchronous and synchronous circuits descriptions and the limitations which must be considered. We also describe various asynchronous circuits implementations, where the focus is implementation on FPGA.
As part of the master’s thesis, a FPGA asynchronous circuits design library was established. It contains a variety of building blocks with which we can set up arbitrary asynchronous circuits. The library emphasis is portability to various FPGAs, so minimal number of vendor specific components can be used. The library works without any time assumptions and without manual placement. Additionaly a various asynchronous circuits on FPGA, made using our library, were measured. Circuits with different complexities were analyzed and different implementation styles advantages and disadvantages were highlited. Asynchronous circuits implemented on FPGA work reliably and achieve effective frequencies up to 45MHz. They occupy significantly more area and are significantly slower than their synchronous equivalents.
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