This thesis delves into faults on Arm Cortex-M microprocessors, consisting of
ARMv6-M, ARMv7-M and ARMv8-M architectures. It begins with an overview
of exceptions, consisting of faults and interrupts, explaining some key terms such as
exception numbers, priority levels, execution priority, vector table and stack pointers.
Methods of exception priority storage, entry, return, chaining and late-arrival are
described, alongside speed-up procedures designed by the silicon designer.
Exceptions for three ARM microprocessor architectures are listed. Emphasis
is given to faults, together with their possible causes and explanations of relevant
configuration and status registers.
A practical application for triggering faults on purpose is developed, accompanied
by a custom fault handler. It is tested on the MiŠKo3 development board. The handler
describes various fault states to the user and is intended as a drop-in debugging aid
for new and existing software projects.
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