The need for transconductance amplifiers that control high capacitive loads is widespread in many applications. The master’s thesis deals with the design of class AB transconductance power amplifier in CMOS technology for large capacitive loads.
In this master’s thesis, the existing methods of control and compensation of amplifiers that drive large capacitive loads, such as Miller compensation, CBMC, DACFC, STCB, compensation with adaptive nonlinear load, are evaluated. Based on the properties of the amplifiers from the literature, the amplifier topology described in this paper was chosen, which is a combination of an folded cascade amplifier for the first amplifier stage and a combination of STCB block to achieve high currents and Miller compensation for the second power amplifier stage.
For the selected topology, a theoretical stability calculation was first performed to predict what kind of amplification and compensation capacitors are needed to achieve the desired amplifier output current and bandwidth. Theoretical confirmation is followed by circuit analysis via simulations in a computer tool for analog circuit design, where the entire circuit is analyzed in detail at all boundary conditions set by temperature, voltage supply, and process parameters of transistors. The simulations confirmed that this amplifier topology is suitable for controlling a 110 Ω load in parallel with a capacitor up to 1 nF and that the unity gain reaches to about 700 kHz bandwidth.
After the simulations confirmed the operation of the amplifier, we prepared masks for the manufacture of the amplifier in TSMC 180 nm BCD technology.
The performance of the amplifier was finally confirmed by measurements performed at room temperature, which showed that the performance of the amplifier in most measurements matched the results of the simulations, as the measured values in most measurements were within the values obtained in the simulations.
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