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Numerično modeliranje in simulacija enoelektronskih logičnih vezij
ID KIKELJ, MIHA (Author), ID Lipovšek, Benjamin (Mentor) More about this mentor... This link opens in a new window

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Abstract
V tem delu smo predstavili uporabo orodja MOSES (Monte-Carlo Single- Electronics Simulator), kot metodo za simulacijo komplementarnih enoelektronskih vezij na podlagi ortodoksne teorije. Izvedli smo simulacijo enoelektronske škatle, enoelektronskega tranzistorja in komplementarnega enoelektronskega inverterja. Njihove karakteristike smo ovrednotili pri različnih temperaturah in ocenili njihov potencial za delovanje pri sobni temperaturi. Karakteristike smo primerjali tudi z meritvami realnih struktur, ki so jih izvedli na drugih inštitucijah in ocenili možne razloge za razlikovanje rezultatov. Ocenili smo možnost zamenjave konvencionalnih CMOS vezji z enoelektronsko logiko stanj napetosti in predlagali poenostavljeno strukturo, ki naj bi delovala pri sobni temperaturi.

Language:Slovenian
Keywords:enoelektronska logična vezja, enoelektronski tranzistor, Monte-Carlo. simulacija, MOSES, logika stanj napetosti
Work type:Master's thesis/paper
Organization:FE - Faculty of Electrical Engineering
Year:2018
PID:20.500.12556/RUL-102973 This link opens in a new window
Publication date in RUL:12.09.2018
Views:1441
Downloads:304
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Secondary language

Language:English
Title:Numerical modelling and simulation of single-electron logic circuits
Abstract:
In our contribution we present the use of MOSES (Monte-Carlo Single- Electronics Simulator) as a method for simulation of complementary SET logic circuits based on the orthodox theory. Simulation of single-electron devices including a single-electron box, a single-electron transistor and a complementary single-electron inverter was carried out. Their characteristics were evaluated at different temperatures and the potential for room-temperature operation was assessed. The characteristics were also compared to the measurements obtained at other institutions and deviations between the two were examined. The potential for voltage-state logic to replace conventional CMOS logic circuits was examined and a proposal of a potential structure, operational at room-temperature, was made.

Keywords:single-electron logic circuits, single-electron transistor, Monte-Carlo, MOSES, voltage-state logic

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