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Testirna naprava za staranje elektrolitskih kondenzatorjev
ID ILOVAR, ŽIGA (Author), ID Jankovec, Marko (Mentor) More about this mentor... This link opens in a new window

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Abstract
V magistrski nalogi se ukvarjamo z razvojem vezja, ki služi testiranju življenjske dobe elektrolitskih kondenzatorjev. Naloga vezja je obremeniti testni kondenzator z izmeničnim tokom pri nazivni enosmerni napetosti in beležiti njegove parametre, kot so temperatura, tok in napetost, vse do njegove morebitne odpovedi. V teku razvoja smo preizkusili dva različna pristopa: - vezje s preklapljanjem dveh bank kondenzatorjev in - vezje z ločenim enosmernim in izmeničnim napajanjem. S pomočjo simulacij v programu LTspice smo izbrali izvedbo z ločenim enosmernim in izmeničnim napajanjem, ki nam je služila kot osnova za izdelavo testnega vezja. Po izvedeni analizi testnega vezja smo izdelali končno vezje, kjer je za namen samostojne uporabe naprave implementiran stikalni napajalnik, mikrokrmilnik in komunikacija USB z osebnim računalnikom. Končno vezje je zmožno obremeniti kondenzator z izmeničnim tokom do približno 6 A pri nazivni napetosti 48 V. Frekvenca izmeničnega signala je 15 kHz, ki pa jo v programski kodi mikrokrmilnika lahko spreminjamo. Vezje nam preko komunikacije USB na računalnik pošilja RMS, srednjo in maksimalno vrednost toka, ki teče skozi kondenzator. S končnim vezjem smo testirali kondenzator slabše kvalitete, ki smo ga preobremenili do te mere, da je odpovedal po 10 urah staranja.

Language:Slovenian
Keywords:elektrolitski kondenzator, življenjska doba, testiranje, serijska upornost
Work type:Master's thesis/paper
Organization:FE - Faculty of Electrical Engineering
Year:2018
PID:20.500.12556/RUL-100913 This link opens in a new window
Publication date in RUL:20.04.2018
Views:2567
Downloads:674
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Secondary language

Language:English
Title:Testing device for ageing of electrolytic capacitors
Abstract:
In this master thesis, we present the development of an electrical system for ageing and lifetime assessment of electrolytic capacitors. The main purpose of the system is to excite the capacitor under test with AC current at rated DC voltage and log the electrical parameters, such as temperature, current and voltage until the capacitor’s failure. We investigated two design approaches: - capacitor excitation by switching between two capacitor banks and - capacitor excitation with separate DC and AC power supplies. We analyzed both circuits in LTspice software and chose the principle with separate DC and AC bias which turned to be most suitable for the purpose. Based on the simulation results, we designed a test circuit board. After thorough board analysis, we designed the final circuit board, where we implemented the Atmel microprocessor for easier control and analysis. The final circuit board is capable to excite the capacitor under test with up to 6 A of AC current at 48 V of DC voltage. The frequency of the AC current is set to 15kHz, but it can be set to a different value inside the microcontroller software. The final circuit board sends the RMS, average and maximum value of the capacitor AC current to the computer, using USB communication. Using the final circuit board we tested a capacitor of a poor quality, which we overloaded up to the point, when it failed after 10 hours of aging.

Keywords:electrolytic capacitor, lifespan, testing, serial resistance

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