Optimizacija digitalnih gradnikov na nivoju tranzistorjev

Puhan, Janez (author), Fajfar, Iztok (author), Tuma, Tadej (author), Bürmen, Arpad (author)

• Language: Slovenian
• Keywords: načrtovanje digitalnih integriranih vezij, integrirana vezja, splošni osnovni gradniki, sinteza digitalnih vezij, optimizacija na tranzistorskem nivoju
• Work type: Not categorized (r6)
• Tipology: 1.01 - Original Scientific Article
• Organization: FE - Faculty of Electrical Engineering
• Year: 2011
• Number of pages: str. 31-35
• Numbering: Letn. 78, št. 1/2
• UDC: 621.3.049.77
• ISSN on article: 0013-5852
• COBISS.SI-ID: 262209024
• Average score: (0 votes)
• Your score: Voting is allowed only to logged in users.

Record is a part of a journal

• Title: Elektrotehniški vestnik
• Publisher: Strokovna zadruga koncesijoniranih elektrotehnikov
• ISSN: 0013-5852
• COBISS.SI-ID: 742916

Secondary language

• Language: English
• Keywords: digital ASIC design, pre-designed cells, digital circuit synthesis, transistor-level cell optimisation