20.500.12556/RUL-85954 Implementacija igre Tetris v vezju FPGA Implementation of the Tetris game for FPGA V okviru diplomske naloge je bila razvita različica popularne računalniške igre Tetris. Igra je bila v celoti implementirana v jeziku za opis strojne opreme VHDL s poudarkom na modularni zgradbi. Razvit je bil modul za operacije na aktivnem elementu, ki implementira vodoravne premike, obračanje, padanje in hitre spuste. V podporo temu sta bila razvita modula za psevdonaključni izbor naslednjega elementa in modul za odstranjevanje polnih vrstic. Oba sta bila z modulom za aktivni element povezana preko razvitega modula za igralno polje. Izris na zaslon je bil narejen v modulu za izris znakov in v modulu za izrisni cevovod, ki je hkrati vrhnji strojno-neodvisni modul. Za komunikacijo z igralcem so bili razviti krmilnik zaslona VGA, modul za zaznavanje pritiskov na tipke in krmilnik 7-delnega prikazovalnika. Ti so bili z igro povezani preko razvitega strojno-specifičnega vrhnjega modula za razvojno ploščo Digilent Nexys4. In this thesis, a version of the popular computer game Tetris was developed. The game was fully implemented in the VHDL hardware design language with a focus on modular design. A module was developed for operations on the active element that implements horizontal movement, rotations, falling and fast descent. Other game logic was implemented in the module for pseudorandom selection of next element and the module for full row removal. Both of these were connected to the developed module for the playing field. On screen display was implemented in the developed module for display of characters and the module for pipelined rendering, the later of which represents the top level hardware-independent module. Several hardware-dependent modules were developed for interacting with the player: a 7-segment display controller, a VGA controller and a module for tactile buttons. These modules were all connected with the game via a hardware-dependent top level module for the Digilent Nexys4 development board. tetris tetrimino strojna izvedba igre končni avtomati UNI-VGA BDF VGA VHDL FPGA tetris tetrimino hardware game implementation finite state automata UNI-VGA BDF VGA VHDL FPGA true false false Slovenski jezik Angleški jezik Diplomsko delo/naloga 2016-09-30 09:40:02 2016-09-30 09:40:05 2022-08-09 10:30:14 0000-00-00 00:00:00 2016 0 0 0000-00-00 NiDoloceno NiDoloceno NiDoloceno 0000-00-00 0000-00-00 0000-00-00 1970-01-01 18634 Beader_Fedja_-_Implementacija_igre_Tetris_v_vezju_FPGA.pdf Beader_Fedja_-_Implementacija_igre_Tetris_v_vezju_FPGA.pdf 1 F3A99D5C0F868E96588D1683E1E2A886 dd517b4b6d4972691e738b3ba1a7bbc1d01a93dd51b72e17ed82e10d64446874 0938fc8e-a1b1-11eb-a523-00155dcfd717 20.500.12556/rul/1b6c9816-790e-4a90-a31e-b4b14fe3b61a https://repozitorij.uni-lj.si/Dokument.php?lang=slv&id=89112 Fakulteta za računalništvo in informatiko 0 0 0