20.500.12556/RUL-165256 Free software support for compact modelling with Verilog-A Verilog-A is the analog subset of Verilog-AMS - a hardware description language for analog and mixed-signal systems. Verilog-A is commonly used for the distribution of compact models of semiconductor devices. For such models to be usable a Verilog-A compiler is required. The compiler converts the model equations into a form that can be used by the simulator. Such compilers have been supplied with commercial simulators for many years now. Free software alternatives are much more scarce and limited in the features they offer. The paper gives an overview of Verilog-A, Free software Verilog-A compilers, and Free software/Open source simulators that can simulate compact models defined in Verilog-A. Advantages and disadvantages of individual compilers and simulators are highlighted. hardware description langugage Verilog-A analog circuits circuit simulation compact models jezik za opisovanje strojne opreme Verilog-A analogna vezja simulacija vezij kompaktni modeli true false true Angleški jezik Slovenski jezik Članek v reviji 2024-11-28 09:04:58 2024-11-28 09:04:58 2025-06-30 11:23:17 0000-00-00 00:00:00 2024 0 0 17 str. no. 4 Vol. 54 2024 0000-00-00 Zaloznikova Objavljeno apc 0000-00-00 0000-00-00 0000-00-00 004.43 2232-6979 216529411 1999-6532-2-PB.pdf 1999-6532-2-PB.pdf 1 359E67672C77584FBDFD7912FDEFD851 9a3f5caac4ccafd7ab6c63ad3c3c6bb2c4940695dd20dad835358b90a7f3be45 9340ab3e-b22e-11ef-b232-0050569b8976 https://repozitorij.uni-lj.si/Dokument.php?lang=slv&id=196504 https://ojs.midem-drustvo.si/index.php/InfMIDEM/article/view/1999 1 0c639e6a-ad5f-11ef-b232-0050569b8976 https://repozitorij.uni-lj.si/Dokument.php?lang=slv&id=196322 Fakulteta za elektrotehniko 0 0 0