Evolutionary synthesis of failure-resilient analog circuitsRojec, Žiga (Avtor) Fajfar, Iztok (Avtor) Bürmen, Arpad (Avtor) evolutionary algorithmsanalog circuit synthesisfailure-resilient circuitsNSGA-II algorithmAnalog circuit design requires large amounts of human knowledge. A special case of circuit design is the synthesis of robust and failure-resilient electronics. Evolutionary algorithms can aid designers in exploring topologies with new properties. Here, we show how to encode a circuit topology with an upper-triangular incident matrix and use the NSGA-II algorithm to find computational circuits that are robust to component failure. Techniques for robustness evaluation and evolutionary algorithm guidances are described. As a result, we evolve square root and natural logarithm computational circuits that are robust to high-impedance or short-circuit malfunction of an arbitrary rectifying diode. We confirm the simulation results by hardware circuit implementation and measurements. We think that our research will inspire further searches for failure-resilient topologies.20222022-05-19 10:08:45Članek v reviji136747UDK: 004ISSN pri članku: 2227-7390DOI: 10.3390/math10010156COBISS_ID: 92450563sl