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<metadata xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:dc="http://purl.org/dc/elements/1.1/"><dc:title>Real-Time Processing of Image Streams</dc:title><dc:creator>HUDOMALJ,	UROŠ	(Avtor)
	</dc:creator><dc:creator>Tuma,	Tadej	(Mentor)
	</dc:creator><dc:subject>image processing</dc:subject><dc:subject>real-time image processing</dc:subject><dc:subject>FPGA</dc:subject><dc:subject>camera</dc:subject><dc:subject>Camera Link</dc:subject><dc:subject>interface</dc:subject><dc:description>This master’s thesis presents an FPGA based system for real-time processing of a Camera Link image stream. The system is based on Microsemi’s Smartfusion2 Advanced Development Kit which includes a SmartFusion2 M2S150 SoC FPGA and an industrial camera which uses the Camera Link I/F. The system is meant to be inserted between the camera and the intended receiver, providing real-time processing of the images captured by the camera. The developed system is capable of processing images up to the frame rate of 118.23 fps at the maximum image size provided by the used camera, namely 1216 by 1936 pixels.
For acquiring images sent by the camera and to transmit the processed images to the intended receiver, a Camera Link receiver and a Camera Link transmitter were designed. The receiver and transmitter implemented in the FPGA support the Camera Link interface at base, medium and full configurations at frequencies up to 38.2 MHz.
Some of the widely used algorithms for preprocessing of images were designed to be implemented in the system. These are: image filtering, edge detection, background subtraction, image averaging, and flat-field correction. Some of these algorithms use external DDR memory. Therefore, a circuit for accessing the DDR memory was designed as well. The circuit was designed to achieve the highest possible throughput of the DDR memory used.</dc:description><dc:date>2019</dc:date><dc:date>2019-10-28 10:10:01</dc:date><dc:type>Magistrsko delo/naloga</dc:type><dc:identifier>112628</dc:identifier><dc:identifier>VisID: 49281</dc:identifier><dc:language>sl</dc:language></metadata>
