Krmilnik video prikazovalnika z vmesnikom HDMI

MATKO, MATJAŽ (avtor), Trost, Andrej (mentor)

V diplomskem delu smo razvili krmilnik video prikazovalnika z vezjem FPGA. Za razvoj vezja smo uporabili razvojno ploščo Arty z FPGA družine Artix. V prvi fazi smo opisali različne standarde za prikazovanje, nato pa še podrobneje standard HDMI. Standard HDMI temelji na TMDS tehnologiji prenosa podatkov. Podrobneje smo opisali TMDS tehnologijo, kodirni in dekodirni algoritem. Za povezavo med FPGA in zaslonom smo izdelali dodatni modul, ki vsebuje HDMI konektor. V delu smo na kratko opisali razlike med programskima jezikoma VHDL in Verilog. Krmilnik video prikazovalnika smo razvili v razvojnem okolju Xilinx v programskem jeziku VHDL. Digitalno vezje kodirnika smo razdelili na dva segmenta in sicer na TMDS kodirnik in generator signalov RGB. Delovanje vezja smo preizkusili z razvojno ploščo Arty povezano na zaslon preko HDMI vmesnika in HDMI kabla. Za preverjanje delovanja grafike lahko poljubno nastavljamo signale RGB.

• Jezik: Slovenski jezik
• Ključne besede: HDMI, TMDS, FPGA, video prikazovalnik
• Vrsta gradiva: Diplomsko delo/naloga
• Organizacija: FE - Fakulteta za elektrotehniko
• Leto izida: 2016
• PID: 20.500.12556/RUL-88344
• Datum objave v RUL: 23.12.2016

MATKO, MATJAŽ, 2016, Krmilnik video prikazovalnika z vmesnikom HDMI [na spletu]. Diplomsko delo. [Dostopano 2 maj 2025]. Pridobljeno s: https://repozitorij.uni-lj.si/IzpisGradiva.php?lang=slv&id=88344

Sekundarni jezik

• Jezik: Angleški jezik
• Naslov: Video display controller with HDMI interface

Izvleček

For the thesis we developed a video display controller with FPGA circuit. For the development of the circuit we used a development board Arty from Artix FPGA family. In the first phase we described the various standards for displaying, and then in details HDMI standard. HDMI standard is based on the technology TMDS transmission data. In details we described TMDS technology, coding and decoding algorithm. We made an additional module with HDMI connector to link the FPGA and the screen. In the thesis we briefly described the difference between the VHDL programming language and the Verilog. A video display controller was developed in Xilinx development environment in the VHDL programming language. We divided the digital circuit of encoder into two segments, namely TMDS encoder and RGB signal generator. We tested the functioning of the circuit with a development board Arty connected to the screen via HDMI and the HDMI cable. To check the functioning of graphics, we can individually adjust RGB signals.

• Ključne besede: HDMI, TMDS, FPGA, video display